After the last register of the charge‑packet horizontal shift register, the charge packets need to be non‑destructively delivered in the form of current or voltage.

Output structures include reverse‑biased diode output structure, floating diffusion (FD) output structure, floating‑gate structure, distributed floating‑gate structure, etc. Among them, the floating diffusion (FD) output structure is the most widely used, as shown in the figure below:

The output gate maintains a fixed medium‑level voltage. When Φreset is at a low level and Φ3 falls, charge packets are transferred into the potential well of the reverse‑biased diode. The potential at point D changes, which is amplified and detected by transistor T2 and then sent to the analog‑to‑digital conversion circuit (it can also be fed directly to the analog‑to‑digital conversion circuit without amplification).
After detection, a narrow positive pulse is applied to Φreset to turn on transistor T1. The bias voltage is directly applied to point D, and the charge packets are drained away. Afterwards, T1 turns off to get ready for receiving the next charge packet.

Reset noise will be introduced during the output process.


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